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영문 논문지

홈 홈 > 연구문헌 > 영문 논문지 > JSTS (Journal of Semiconductor Technology and Science)

JSTS (Journal of Semiconductor Technology and Science)

Current Result Document : 2 / 14 이전건 이전건   다음건 다음건

한글제목(Korean Title) Stability and Design Limits of Hysteretic Current-mode Switched-inductor Converters
영문제목(English Title) Stability and Design Limits of Hysteretic Current-mode Switched-inductor Converters
저자(Author) Carlos J. Solis   Gabriel A. Rinc?-Mora                             
원문수록처(Citation) VOL 19 NO. 04 PP. 0321 ~ 0326 (2019. 08)
한글내용
(Korean Abstract)
영문내용
(English Abstract)
Emerging wireless microsystems rely on tiny batteries and intermittent energy-harvesting sources for energy and power. To sense, process, and report numerous events across extended periods, they often idle and wake to full-power conditions. Their power supplies must therefore be compact and efficient and respond quickly to sudden wide load changes. Hysteretic current-mode switched-inductor dc–dc converters are good for this application space because they are compact, efficient, and fast. Although also widely stable, they are nevertheless subject to instabilities. This paper explains how input and output voltages and load dumps limit stability, and as a result, bandwidth and response time. Measurements of a 200-mA, 1-V, 0.18-μm CMOS hysteretic current-mode buck with 95% peak powerconversion efficiency show how increasing the loaddump step by 140 mA and decreasing the input voltage by 400 mV compromise stability.
키워드(Keyword) Design   analysis   stability   high bandwidth   dc뻚c power supply   hysteretic current-mode control                       
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